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Computer-Aided VLSI Design

ProgramTeacherCreditDuration

Electronics

Qiang Liu

4

64

Course Name: Computer-Aided VLSI Design

Course Code: S2293172

Semester: 4

Credit: 4

Program: Electronics

Course Module: Optional Courses (Electrical Science)

Responsible: Qiang Liu

E-mail: qiangliu@tju.edu.cn

Department:Tianjin International Engineering Institute, Tianjin University

TimeAllocation(1 credit hour = 45 minutes)

Exercise

Lecture

Lab-study

Project

Internship

(days)

Personal Work

17

21

26

0

0

16

Course Description

VLSI design flow, FPGA structures and principles.

Design FSM, Verilog.

Digital system design based on FPGA using Verilog.

Prerequisite

VLSI systems; Circuits and Systems.

Course Objectives

The aims of the course are:

  • To learn about digital circuits work,

  • To learn how to implement reasonably complicated circuits on FPGAs,

  • To learn how to design with Verilog HDL.

  • By the end of the course, students should be able to:

  • Analyze the operation of synchronous digital systems,

  • Synthesize a synchronous digital system to meet a specification,

  • Design of finite state machines, and to

  • Design using Verilog HDL

Course Syllabus

  1. FPGA introduction.

    1. FPGA technology.

    2. FPGA origin.

    3. FPGA applications and current status.

  2. FPGA structure.

    1. Programmable logic blocks.

    2. Programmable interconnect.

    3. Embedded dedicated blocks.

  3. Clock resources.

  4. I/O blocks.

  5. Verilog HDL.

    1. Introduction.

    2. Common used syntax.

    3. The basic structure of a module.

    4. Data types.

    5. Assignments and Always blocks.

    6. Arithmetic and logic operations.

    7. FSM.

    8. Test-benches.

  6. HDL-based FPGA design flow.

    1. Abstract levels of circuit description.

    2. A typical design flow.

    3. HDL capture.

    4. RTL simulation.

    5. Logic synthesis.

    6. Physical implementation.

    7. Post-layout timing analysis.

  7. FPGA reconfiguration.

    1. FPGA configuration methods.

    2. Partial reconfiguration.

  8. FPGA device selection.

    1. Right device selection.

    2. Structures, technologies and applications.

Textbooks & References

  • Brown and Vranesic.Fundamental of Digital Logic with Verilog Design(3rd ed).

  • W.J. Dally and R. Curtis.Digital Design: A Systems Approach. Cambridge University Press.

Grade Distribution

Attendance: 10% Experiment:30% Final Exam: 60%

Capability Tasks

CT1: To understand basic science, and to have analytical ability and the ability to integrate related knowledge.

CT2: To apply relevant professional knowledge to the field of science and technology: understanding of the basic concepts and its connotation, application of different methods and concepts which have been learned, capability of judging the scope and limitations of such applications.

CT3: To grasp methodologies and engineering tools: identifying, utilizing and solving problems. Even if the students are not familiar with the content, they can turn to computer tools for systematic analysis.

CT4: To carry out experiments in research environment with the abilities to utilize tools, especially for data collection and processing.

CT10: To have the capacity to work in international environment; the capability to master one or more foreign languages and be open to foreign cultures; be able to acclimatize themselves to the international language environment.

Achievements

  • To analyze the operation of synchronous digital systems. – Level M

  • To synthesize a synchronous digital system to meet a specification. – Level M

  • To design finite state machines. – Level M

  • To design using Virology HDL. – Level M

Students: Electronics, Year 2